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Creators/Authors contains: "Gopalan, Padma"

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  1. Tangential flow interfacial self-assembly (TaFISA) is a promising scalable technique enabling uniformly aligned carbon nanotubes for high-performance semiconductor electronics. In this process, flow is utilized to induce global alignment in two-dimensional nematic carbon nanotube assemblies trapped at a liquid/liquid interface, and these assemblies are subsequently deposited on target substrates. Here, we present an observational study of experimental parameters that affect the interfacial assembly and subsequent aligned nanotube deposition. We specifically study the water contact angle (WCA) of the substrate, nanotube ink composition, and water subphase and examine their effects on liquid crystal defects, overall and local alignment, and nanotube bunching or crowding. By varying the substrate chemical functionalization, we determine that highly aligned, densely packed, individualized nanotubes deposit only at relatively small WCA between 35 and 65°. At WCA (< 10°), high nanotube bunching or crowding occurs, and the film is nonuniform, while aligned deposition ceases to occur at higher WCA (>65°). We find that the best alignment, with minimal liquid crystal defects, occurs when the polymer-wrapped nanotubes are dispersed in chloroform at a low (0.6:1) wrapper polymer to nanotube ratio. We also demonstrate that modifying the water subphase through the addition of glycerol not only improves overall alignment and reduces liquid crystal defects but also increases local nanotube bunching. These observations provide important guidance for the implementation of TaFISA and its use toward creating technologies based on aligned semiconducting carbon nanotubes. 
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  2. Abstract Modification of a surface with polymer brushes has emerged as an effective approach to tune the properties of a substrate. Brushes grown from an inimer‐containing cross‐linkable polymer coating provide significant advantages compared to other “grafting‐from” methods, such as improved stability, increased grafting density, and the potential to control the grafting density. So far, the inimer coating method has only been applied for surface‐initiated controlled radical polymerizations. In this work, an approach is presented for the fabrication of a stable cross‐linked ultra‐thin polymer coating containing hydroxyl groups which serve as initiating sites for surface‐initiated ring‐opening polymerization (SI‐ROP). The polymers used for the fabrication of the coatings consist of 2‐((tetrahydro‐2H‐pyran‐2‐yl)oxy)ethyl methacrylate (THPEMA), a small fraction of a cross‐linkable unit, and a diluent styrene. Three coatings with varying THPEMA and styrene content are fabricated, and poly(dimethyl siloxane) (PDMS) and poly(caprolactone) (PCL) brushes are grown by SI‐ROP of hexamethylcyclotrisiloxane (D3), and ε‐caprolactone respectively. The brushes are characterized by atomic force microscopy (AFM), X‐ray photoelectron spectroscopy (XPS), static contact angle measurements, ellipsometry and size exclusion chromatography (SEC). The results demonstrate a well‐controlled ROP of D3and ability to control grafting density by tuning the THPEMA content of the coatings. 
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  3. We examine if the bundling of semiconducting carbon nanotubes (CNTs) can increase the transconductance and on-state current density of field effect transistors (FETs) made from arrays of aligned, polymer-wrapped CNTs. Arrays with packing density ranging from 20 to 50 bundles  μm −1 are created via tangential flow interfacial self-assembly, and the transconductance and saturated on-state current density of FETs with either (i) strong ionic gel gates or (ii) weak 15 nm SiO 2 back gates are measured vs the degree of bundling. Both transconductance and on-state current significantly increase as median bundle height increases from 2 to 4 nm, but only when the strongly coupled ionic gel gate is used. Such devices tested at −0.6 V drain voltage achieve transconductance as high as 50 μS per bundle and 2 mS  μm −1 and on-state current as high as 1.7 mA  μm −1 . At low drain voltages, the off-current also increases with bundling, but on/off ratios of ∼10 5 are still possible if the largest (95th percentile) bundles in an array are limited to ∼5 nm in size. Radio frequency devices with strong, wraparound dielectric gates may benefit from increased device performance by using moderately bundled as opposed to individualized CNTs in arrays. 
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  4. Controlling the deposition of polymer-wrapped single-walled carbon nanotubes (s-CNTs) onto functionalized substrates can enable the fabrication of s-CNT arrays for semiconductor devices. In this work, we utilize classical atomistic molecular dynamics (MD) simulations to show that a simple descriptor of solvent structure near silica substrates functionalized by a wide variety of self-assembled monolayers (SAMs) can predict trends in the deposition of s-CNTs from toluene. Free energy calculations and experiments indicate that those SAMs that lead to maximum disruption of solvent structure promote deposition to the greatest extent. These findings are consistent with deposition being driven by solvent-mediated interactions that arise from SAM-solvent interactions, rather than direct s-CNT-SAM interactions, and will permit the rapid computational exploration of potential substrate designs for controlling s-CNT deposition and alignment. 
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  5. The synthesis of functional graphene nanostructures on Ge(001) provides an attractive route toward integrating graphene-based electronic devices onto complementary metal oxide semiconductor-compatible platforms. In this study, we leverage the phenomenon of the anisotropic growth of graphene nanoribbons from rationally placed graphene nanoseeds and their rotational self-alignment during chemical vapor deposition to synthesize mesoscale graphene nanomeshes over areas spanning several hundred square micrometers. Lithographically patterned nanoseeds are defined on a Ge(001) surface at pitches ranging from 50 to 100 nm, which serve as starting sites for subsequent nanoribbon growth. Rotational self-alignment of the nanoseeds followed by anisotropic growth kinetics causes the resulting nanoribbons to be oriented along each of the equivalent, orthogonal Ge⟨110⟩ directions with equal probability. As the nanoribbons grow, they fuse, creating a continuous nanomesh. In contrast to nanomesh synthesis via top-down approaches, this technique yields nanomeshes with atomically faceted edges and covalently bonded junctions, which are important for maximizing charge transport properties. Additionally, we simulate the electrical characteristics of nanomeshes synthesized from different initial nanoseed-sizes, size-polydispersities, pitches, and device channel lengths to identify a parameter-space for acceptable on/off ratios and on-conductance in semiconductor electronics. The simulations show that decreasing seed diameter and pitch are critical to increasing nanomesh on/off ratio and on-conductance, respectively. With further refinements in lithography, nanomeshes obtained via seeded synthesis and anisotropic growth are likely to have superior electronic properties with tremendous potential in a multitude of applications, such as radio frequency communications, sensing, thin-film electronics, and plasmonics. 
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